The ongoing trend in the semiconductor industry to disperse the design, fabrication, and testing tasks among companies with different specializations has been driven by various factors related to cost and globalization. Consequently, an increasing number of chips are fabricated in new areas around the world. The trend to fabricate chip designs abroad has, however, led to high security risks, because malicious Trojan hardware can be inserted in less controlled manufacturing environments during the fabrication process of chips. Hardware Trojans can be designed to disclose secret information or access keys, to temporarily disable a system, or to destroy a system. In recent years, they have been identified as a growing problem for chips in, for example, medical applications, wireless cryptography, and military systems. A 2013 task force report from the U.S. Defense Science Board describes concerns related to power, water, and financial infrastructure vulnerabilities caused by hardware Trojans.
Diverse approaches are emerging to detect harmful circuits that can leak information, manipulate information, or deactivate a chip. Many of these techniques involve measurements of power dissipation with external test equipment to identify the presence of maliciously inserted circuits.
Some prior art detection methods are based on the measurement of current or power consumption for the identification of malicious hardware insertions on chips. Some approaches incorporate on-chip sensors to measure the current supplied to clusters of circuits or to measure some other indicator of local electrical power dissipation. A commonality of these approaches is that either a resistor or a transistor is connected within the path between the supply voltage and the circuit in order to sense the current/power. These methods require monitoring of small power dissipations throughout chips, and their effectiveness to detect small Trojan circuits improves as the number of current or power probe locations increases.